1. Field of the Invention
The present invention relates to a solid-state image-sensing device having pixels that output electric signals according to incident light, and to a camera provided with such a solid-state image-sensing device. More particularly, the present invention relates to a solid-state image-sensing device having pixels that are built with transistors, and to a camera provided with such a solid-state image-sensing device.
2. Description of Related Art
Solid-state image-sensing devices have been finding wide application. Such solid-state image-sensing devices are classified roughly into a CCD type and a CMOS type depending on how they read out (extract) the photoelectric charges generated in photoelectric conversion elements. In the CCD type, photoelectric charges are transferred while being accumulated in potential wells. This results in narrow dynamic ranges. On the other hand, in the CMOS type, electric charges accumulated in the pn-junction capacitors of photodiodes are read out directly via MOS transistors, and further MOS transistors for amplification are also incorporated in pixels.
Some conventional CMOS-type solid-state image-sensing devices perform logarithmic conversion by logarithmically converting the amount of incident light (see Japanese Patent Application Laid-open No. H11-313257). This type of solid-state image-sensing device has a dynamic range as wide as expressed with a five- to six-digit figure. Thus, even when a subject having a somewhat wider-then-usual brightness distribution is sensed, it is possible to output an electric signal into which all the brightness information within the brightness distribution has been converted. The problem here is that, since the shootable brightness range is now wider than the brightness distribution of the subject, in a low-brightness or high-brightness part of the shootable brightness range, there tends to appear a region where no brightness data is available.
In this context, the applicant of the present invention once proposed a CMOS-type solid-state image-sensing device whose operation can be switched between linear conversion for producing an electric signal that varies in a linear proportion to the amount of incident light and logarithmic conversion as described above (see Japanese Patent Application Laid-open No. 2002-77733). Moreover, to achieve automatic switching between linear conversion and logarithmic conversion, the applicant of the present invention once proposed a CMOS-type solid-state image-sensing device in which the transistors connected to photoelectric conversion photodiodes are brought into an appropriate potential state (see Japanese Patent Application Laid-open No. 2002-300476). The solid-state image-sensing device proposed in this publication, by permitting the potential state of the transistors to be changed, permits the inflection point across which their photoelectric conversion operation is switched between linear conversion and logarithmic conversion to be changed.
Other conventionally available solid-state image-sensing devices have pixels built with buried photodiodes PD as shown in FIG. 1. The pixel shown in FIG. 1 includes: a buried photodiode PD formed in a P-type well layer or a P-type substrate and composed of a P-type layer 10 and an N-type buried layer 11; a transfer gate TG formed, with an insulating layer 12 interposed, on the surface of a region adjacent to the region in which the buried photodiode PD is formed; and an N-type floating diffusion layer FD formed in a region adjacent to the region in which the transfer gate TG is formed.
In the buried photodiode PD, a high-density P-type layer 10 is formed on the surface of the N-type buried layer 11. The N-type buried layer 11, the N-type floating diffusion layer FD, and the transfer gate TG together form an N-channel MOS transistor T1. As the result of the buried photodiode PD being built within the pixel in this way, the potential at the surface of the P-type layer 10, which is part of the buried photodiode PD, is fixed at the same potential as the channel stopper layer formed by the P-type layer located around the buried photodiode PD.
The pixel shown in FIG. 1 further includes: an N-channel MOS transistor T2 that has the source thereof connected to the N-type floating diffusion layer FD and that receives at the drain thereof a direct-current voltage VPD; an N-channel MOS transistor T3 that has the gate thereof connected to the source of the MOS transistor T2 and that receives at the drain thereof the direct-current voltage VPD; and an N-channel MOS transistor T4 that has the drain thereof connected to the source of the MOS transistor T3 and that has the source thereof connected to an output signal line 4. Moreover, signals φTX, φRS, and φV are fed to the transfer gate TG, to the gate of the MOS transistor T2, and to the gate of the MOS transistor T4, respectively.
When the pixel shown in FIG. 1 is operated with the levels of the signals φTX, φRS, and φV shifted according to the timing chart shown in FIG. 29, it outputs a sensed-image signal, linearly converted, and a noise signal. Specifically, first, a high-level pulse is fed as the signal φRS to turn the MOS transistor T2 on, so that the N-type floating diffusion layer FD, which is connected to the drain of the MOS transistor T2, is reset. Then a high-level pulse is fed as the signal φV to turn the MOS transistor T4 on, so that a noise signal immediately after resetting is outputted.
Then, a high-level pulse is fed as the signal φTX to turn the transfer gate TG on, so that the photoelectric charge accumulated in the buried photodiode PD moves to the N-type floating diffusion layer FD. Thus, the potential at the N-type floating diffusion layer FD is commensurate with the amount of light incident on the buried photodiode PD, and accordingly a voltage commensurate with the integral of the amount of light incident on the buried photodiode PD appears at the gate of the MOS transistor T3. Then, a high-level pulse is fed as the signal φV to turn the MOS transistor T4 on, so that a linearly converted image signal is outputted.
As against a CMOS-type solid-state image-sensing device using conventional photodiodes, a solid-state image-sensing device having buried photodiodes PD built within pixels, like the one shown in FIG. 1, can suppress the dark currents that occur on the surface of the buried photodiodes, and can thus suppress the dark currents that occur within the pixels. Thus, with a solid-state image-sensing device having pixels configured as shown in FIG. 1, it is possible to reduce variations among the signals from the individual pixels.
Moreover, in a solid-state image-sensing device having pixels configured as shown in FIG. 1, the N-type floating diffusion layer FD, which performs sampling, is not shared as a photoelectric converter, and thus can be made accordingly small. This helps obtain a higher charge-to-voltage conversion ratio. Furthermore, by outputting image and noise signals as shown in FIG. 29 and using correlated double sampling, it is possible to eliminate the KTC noise in the N-type floating diffusion layer FD.
Disadvantageously, however, a solid-state image-sensing device having pixels configured as shown in FIG. 1 and driven according to the timing chart shown in FIG. 29, just like a CCD-type solid-state image-sensing device, outputs linearly converted image signals. Yielding, in this way, outputs proportional to the amounts of photoelectric charge generated in buried photodiodes results in a narrow dynamic range. On the other hand, in the CMOS-type solid-state image-sensing devices mentioned above, no mention is made of forming a floating diffusion layer. Thus, to realize simultaneous shuttering that permits individual pixels to perform image sensing simultaneously, it is necessary to provide each pixel with another MOS transistor for simultaneous shuttering. This complicates the circuit configuration of the pixel, and increases the pixel size, resulting in a lower aperture ratio.